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10,615 Commits 22 Branches 3 Tags
Commit Graph

282 Commits

Author SHA1 Message Date
ReinUsesLisp
878672f371 shader_decode: Implement TEXS (F32) 2019-01-15 17:54:50 -03:00
ReinUsesLisp
c703f0aee4 shader_decode: Implement FSETP 2019-01-15 17:54:50 -03:00
ReinUsesLisp
8215ae942c shader_decode: Partially implement BRA 2019-01-15 17:54:50 -03:00
ReinUsesLisp
4f95dc950e shader_decode: Implement IPA 2019-01-15 17:54:50 -03:00
ReinUsesLisp
cacb934f21 shader_decode: Implement EXIT 2019-01-15 17:54:50 -03:00
ReinUsesLisp
0c049e0a21 shader_decode: Implement ST_A 2019-01-15 17:54:50 -03:00
ReinUsesLisp
e3f1233ce1 shader_decode: Implement LD_A 2019-01-15 17:54:50 -03:00
ReinUsesLisp
ea358bd4bf shader_decode: Implement FADD32I 2019-01-15 17:54:50 -03:00
ReinUsesLisp
c9b2a1b051 shader_decode: Implement FMUL32_IMM 2019-01-15 17:54:50 -03:00
ReinUsesLisp
2edee801ce shader_decode: Implement MOV32_IMM 2019-01-15 17:54:50 -03:00
ReinUsesLisp
06cb910c6d shader_decode: Stub RRO_C, RRO_R and RRO_IMM 2019-01-15 17:54:50 -03:00
ReinUsesLisp
5e6a0a08c1 shader_decode: Implement FMNMX_C, FMNMX_R and FMNMX_IMM 2019-01-15 17:54:50 -03:00
ReinUsesLisp
964ddeeb90 shader_decode: Implement MUFU 2019-01-15 17:54:50 -03:00
ReinUsesLisp
4ccaa1402d shader_decode: Implement FADD_C, FADD_R and FADD_IMM 2019-01-15 17:54:50 -03:00
ReinUsesLisp
7c192ec43f shader_decode: Implement FMUL_C, FMUL_R and FMUL_IMM 2019-01-15 17:54:50 -03:00
ReinUsesLisp
4c70d5b8eb shader_decode: Implement MOV_C and MOV_R 2019-01-15 17:54:50 -03:00
ReinUsesLisp
0c6fb456e0 glsl_decompiler: Implementation 2019-01-15 17:54:50 -03:00
ReinUsesLisp
fbc67a0563 shader_ir: Add condition code helper 2019-01-15 17:54:50 -03:00
ReinUsesLisp
a58abbcfc4 shader_ir: Add predicate combiner helper 2019-01-15 17:54:49 -03:00
ReinUsesLisp
bf07272695 shader_ir: Add comparison helpers 2019-01-15 17:54:49 -03:00
ReinUsesLisp
60f044df56 shader_ir: Add half float helpers 2019-01-15 17:54:49 -03:00
ReinUsesLisp
e3c55e31d7 shader_ir: Add integer helpers 2019-01-15 17:54:49 -03:00
ReinUsesLisp
833d0806f9 shader_ir: Add float helpers 2019-01-15 17:54:49 -03:00
ReinUsesLisp
6b9eea3fe5 shader_ir: Add setters 2019-01-15 17:54:49 -03:00
ReinUsesLisp
12a95ff453 shader_ir: Add local memory getters 2019-01-15 17:54:49 -03:00
ReinUsesLisp
2f87fd060d shader_ir: Add internal flag getters 2019-01-15 17:54:49 -03:00
ReinUsesLisp
15f431f0cb shader_ir: Add attribute getters 2019-01-15 17:54:49 -03:00
ReinUsesLisp
864e8f55cf shader_ir: Add constant buffer getters 2019-01-15 17:54:49 -03:00
ReinUsesLisp
5e639bfcf6 shader_ir: Add register getter 2019-01-15 17:54:49 -03:00
ReinUsesLisp
4aaa2192b9 shader_ir: Add immediate node constructors 2019-01-15 17:54:49 -03:00
ReinUsesLisp
15a0e1481d shader_ir: Initial implementation 2019-01-15 17:54:49 -03:00
James Rowe
1d28b2e142 Remove references to PICA and rasterizers in video_core 2018-01-12 19:11:03 -07:00
Huw Pascoe
a234e4c200 Improved performance of FromAttributeBuffer 
Ternary operator is optimized by the compiler
whereas std::min() is meant to return a value.

I've noticed a 5%-10% emulation speed increase.
 2017-09-17 15:56:36 +01:00
wwylele
8285ca4ad8 pica/shader/jit: implement SETEMIT and EMIT 2017-08-19 10:13:20 +03:00
wwylele
bb63ae3052 correct constness 2017-08-19 10:13:20 +03:00
wwylele
28128348f2 pica/shader/interpreter: implement SETEMIT and EMIT 2017-08-19 10:13:20 +03:00
wwylele
46c6973d2b pica/shader: extend UnitState for GS 
Among four shader units in pica, a special unit can be configured to run both VS and GS program. GSUnitState represents this unit, which extends UnitState (which represents the other three normal units) with extra state for primitive emitting. It uses lots of raw pointers to represent internal structure in order to keep it standard layout type for JIT to access.
This unit doesn't handle triangle winding (inverting) itself; instead, it calls a WindingSetter handler. This will be explained in the following commits
 2017-08-19 10:13:20 +03:00
wwylele
c89f804a01 pica/shader_interpreter: fix off-by-one in LOOP 2017-07-27 13:48:27 +03:00
Yuri Kunde Schlesner
f6715f98f5 Stop using reserved operator names (and/or/xor) with Xbyak 
Also has the Dynarmic upgrade with the same change
 2017-06-17 12:20:22 -07:00
Jannik Vogel
925724c990 Pica: Set program code / swizzle data limit to 4096 
One of the later commits will enable writing to GS regs.
It turns out that on startup, most games will write 4096 GS program words.

The current limit of 1024 would hence result in 3072 (4096 - 1024) error messages:
```
HW.GPU <Error> video_core/shader/shader.cpp:WriteProgramCode:229: Invalid GS program offset 1024
```

New constants have been introduced to represent these limits.
The swizzle data size has also been raised. This matches the given field sizes of [GPUREG_SH_OPDESCS_INDEX](https://3dbrew.org/wiki/GPU/Internal_Registers#GPUREG_SH_OPDESCS_INDEX) and [GPUREG_SH_CODETRANSFER_INDEX](https://www.3dbrew.org/wiki/GPU/Internal_Registers#GPUREG_SH_CODETRANSFER_INDEX) (12 bit = [0; 4095]).
 2017-05-11 15:01:27 +02:00
Mat M
0cb52ee74a Doxygen: Amend minor issues (#2593) 
Corrects a few issues with regards to Doxygen documentation, for example:

- Incorrect parameter referencing.
- Missing @param tags.
- Typos in @param tags.

and a few minor other issues.
 2017-02-26 17:58:51 -08:00
Yuri Kunde Schlesner
e10b11a5d0 video_core/shader: Document sanitized MUL operation 2017-02-12 13:29:14 -08:00
Yuri Kunde Schlesner
443bb3d522 Merge pull request #2550 from yuriks/pica-refactor2 
Small VideoCore cleanups
 2017-02-12 12:33:26 -08:00
Yuri Kunde Schlesner
e2fa1ca5e1 video_core: Fix benign out-of-bounds indexing of array (#2553) 
The resulting pointer wasn't written to unless the index was verified as
valid, but that's still UB and triggered debug checks in MSVC.

Reported by garrettboast on IRC
 2017-02-10 20:51:09 -08:00
Yuri Kunde Schlesner
60fc0b086f VideoCore: Split regs.h inclusions 2017-02-09 00:04:24 -08:00
Yuri Kunde Schlesner
5759d94b5c VideoCore: Move Regs to its own file 2017-02-04 13:59:12 -08:00
Yuri Kunde Schlesner
f7c7f422c6 VideoCore: Split shader regs from Regs struct 2017-02-04 13:59:11 -08:00
Yuri Kunde Schlesner
000e78144c VideoCore: Split rasterizer regs from Regs struct 2017-02-04 13:08:47 -08:00
Yuri Kunde Schlesner
97e06b0a0d Merge pull request #2476 from yuriks/shader-refactor3 
Oh No! More shader changes!
 2017-02-04 13:02:48 -08:00
wwylele
6dc1d6e568 ShaderJIT: add 16 dummy bytes at the bottom of the stack 2017-02-03 14:53:38 +02:00