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	Merge pull request #3506 from namkazt/patch-9
shader_decode: Implement partial ATOM/ATOMS instr
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						commit
						c19425ed69
					
				@ -231,18 +231,6 @@ enum class AtomicOp : u64 {
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    Or = 6,
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    Xor = 7,
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    Exch = 8,
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};
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enum class GlobalAtomicOp : u64 {
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    Add = 0,
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    Min = 1,
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    Max = 2,
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    Inc = 3,
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    Dec = 4,
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    And = 5,
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    Or = 6,
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    Xor = 7,
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    Exch = 8,
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    SafeAdd = 10,
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};
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@ -1001,7 +989,7 @@ union Instruction {
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    } stg;
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    union {
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        BitField<52, 4, GlobalAtomicOp> operation;
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        BitField<52, 4, AtomicOp> operation;
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        BitField<49, 3, GlobalAtomicType> type;
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        BitField<28, 20, s64> offset;
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    } atom;
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@ -2114,6 +2114,10 @@ private:
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    template <const std::string_view& opname, Type type>
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    Expression Atomic(Operation operation) {
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        if ((opname == Func::Min || opname == Func::Max) && type == Type::Int) {
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            UNIMPLEMENTED_MSG("Unimplemented Min & Max for atomic operations");
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            return {};
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        }
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        return {fmt::format("atomic{}({}, {})", opname, Visit(operation[0]).GetCode(),
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                            Visit(operation[1]).As(type)),
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                type};
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@ -2307,6 +2311,8 @@ private:
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        ~Func() = delete;
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        static constexpr std::string_view Add = "Add";
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        static constexpr std::string_view Min = "Min";
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        static constexpr std::string_view Max = "Max";
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        static constexpr std::string_view And = "And";
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        static constexpr std::string_view Or = "Or";
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        static constexpr std::string_view Xor = "Xor";
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@ -2457,7 +2463,21 @@ private:
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        &GLSLDecompiler::AtomicImage<Func::Xor>,
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        &GLSLDecompiler::AtomicImage<Func::Exchange>,
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        &GLSLDecompiler::Atomic<Func::Exchange, Type::Uint>,
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        &GLSLDecompiler::Atomic<Func::Add, Type::Uint>,
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        &GLSLDecompiler::Atomic<Func::Min, Type::Uint>,
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        &GLSLDecompiler::Atomic<Func::Max, Type::Uint>,
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        &GLSLDecompiler::Atomic<Func::And, Type::Uint>,
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        &GLSLDecompiler::Atomic<Func::Or, Type::Uint>,
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        &GLSLDecompiler::Atomic<Func::Xor, Type::Uint>,
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        &GLSLDecompiler::Atomic<Func::Exchange, Type::Int>,
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        &GLSLDecompiler::Atomic<Func::Add, Type::Int>,
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        &GLSLDecompiler::Atomic<Func::Min, Type::Int>,
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        &GLSLDecompiler::Atomic<Func::Max, Type::Int>,
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        &GLSLDecompiler::Atomic<Func::And, Type::Int>,
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        &GLSLDecompiler::Atomic<Func::Or, Type::Int>,
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        &GLSLDecompiler::Atomic<Func::Xor, Type::Int>,
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        &GLSLDecompiler::Branch,
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        &GLSLDecompiler::BranchIndirect,
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@ -1941,7 +1941,11 @@ private:
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        return {};
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    }
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    Expression AtomicAdd(Operation operation) {
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    template <Id (Module::*func)(Id, Id, Id, Id, Id), Type result_type,
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              Type value_type = result_type>
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    Expression Atomic(Operation operation) {
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        const Id type_def = GetTypeDefinition(result_type);
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        Id pointer;
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        if (const auto smem = std::get_if<SmemNode>(&*operation[0])) {
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            pointer = GetSharedMemoryPointer(*smem);
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@ -1949,14 +1953,15 @@ private:
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            pointer = GetGlobalMemoryPointer(*gmem);
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        } else {
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            UNREACHABLE();
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            return {Constant(t_uint, 0), Type::Uint};
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            return {Constant(type_def, 0), result_type};
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        }
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        const Id scope = Constant(t_uint, static_cast<u32>(spv::Scope::Device));
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        const Id semantics = Constant(t_uint, 0U);
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        const Id value = As(Visit(operation[1]), value_type);
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        const Id value = AsUint(Visit(operation[1]));
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        return {OpAtomicIAdd(t_uint, pointer, scope, semantics, value), Type::Uint};
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        const Id scope = Constant(t_uint, static_cast<u32>(spv::Scope::Device));
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        const Id semantics = Constant(type_def, 0);
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        return {(this->*func)(type_def, pointer, scope, semantics, value), result_type};
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    }
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    Expression Branch(Operation operation) {
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@ -2545,7 +2550,21 @@ private:
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        &SPIRVDecompiler::AtomicImageXor,
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        &SPIRVDecompiler::AtomicImageExchange,
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        &SPIRVDecompiler::AtomicAdd,
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        &SPIRVDecompiler::Atomic<&Module::OpAtomicExchange, Type::Uint>,
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        &SPIRVDecompiler::Atomic<&Module::OpAtomicIAdd, Type::Uint>,
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        &SPIRVDecompiler::Atomic<&Module::OpAtomicUMin, Type::Uint>,
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        &SPIRVDecompiler::Atomic<&Module::OpAtomicUMax, Type::Uint>,
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        &SPIRVDecompiler::Atomic<&Module::OpAtomicAnd, Type::Uint>,
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        &SPIRVDecompiler::Atomic<&Module::OpAtomicOr, Type::Uint>,
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        &SPIRVDecompiler::Atomic<&Module::OpAtomicXor, Type::Uint>,
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        &SPIRVDecompiler::Atomic<&Module::OpAtomicExchange, Type::Int>,
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        &SPIRVDecompiler::Atomic<&Module::OpAtomicIAdd, Type::Int>,
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        &SPIRVDecompiler::Atomic<&Module::OpAtomicSMin, Type::Int>,
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        &SPIRVDecompiler::Atomic<&Module::OpAtomicSMax, Type::Int>,
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        &SPIRVDecompiler::Atomic<&Module::OpAtomicAnd, Type::Int>,
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        &SPIRVDecompiler::Atomic<&Module::OpAtomicOr, Type::Int>,
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        &SPIRVDecompiler::Atomic<&Module::OpAtomicXor, Type::Int>,
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        &SPIRVDecompiler::Branch,
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        &SPIRVDecompiler::BranchIndirect,
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@ -19,7 +19,6 @@ namespace VideoCommon::Shader {
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using Tegra::Shader::AtomicOp;
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using Tegra::Shader::AtomicType;
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using Tegra::Shader::Attribute;
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using Tegra::Shader::GlobalAtomicOp;
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using Tegra::Shader::GlobalAtomicType;
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using Tegra::Shader::Instruction;
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using Tegra::Shader::OpCode;
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@ -28,6 +27,28 @@ using Tegra::Shader::StoreType;
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namespace {
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Node GetAtomOperation(AtomicOp op, bool is_signed, Node memory, Node data) {
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    const OperationCode operation_code = [op] {
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        switch (op) {
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        case AtomicOp::Add:
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            return OperationCode::AtomicIAdd;
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        case AtomicOp::Min:
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            return OperationCode::AtomicIMin;
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        case AtomicOp::Max:
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            return OperationCode::AtomicIMax;
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        case AtomicOp::And:
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            return OperationCode::AtomicIAnd;
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        case AtomicOp::Or:
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            return OperationCode::AtomicIOr;
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        case AtomicOp::Xor:
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            return OperationCode::AtomicIXor;
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        case AtomicOp::Exch:
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            return OperationCode::AtomicIExchange;
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        }
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    }();
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    return SignedOperation(operation_code, is_signed, std::move(memory), std::move(data));
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}
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bool IsUnaligned(Tegra::Shader::UniformType uniform_type) {
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    return uniform_type == Tegra::Shader::UniformType::UnsignedByte ||
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           uniform_type == Tegra::Shader::UniformType::UnsignedShort;
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@ -363,10 +384,13 @@ u32 ShaderIR::DecodeMemory(NodeBlock& bb, u32 pc) {
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        break;
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    }
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    case OpCode::Id::ATOM: {
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        UNIMPLEMENTED_IF_MSG(instr.atom.operation != GlobalAtomicOp::Add, "operation={}",
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                             static_cast<int>(instr.atom.operation.Value()));
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        UNIMPLEMENTED_IF_MSG(instr.atom.type != GlobalAtomicType::S32, "type={}",
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                             static_cast<int>(instr.atom.type.Value()));
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        UNIMPLEMENTED_IF_MSG(instr.atom.operation == AtomicOp::Inc ||
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                                 instr.atom.operation == AtomicOp::Dec ||
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                                 instr.atom.operation == AtomicOp::SafeAdd,
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                             "operation={}", static_cast<int>(instr.atom.operation.Value()));
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        UNIMPLEMENTED_IF_MSG(instr.atom.type == GlobalAtomicType::S64 ||
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                                 instr.atom.type == GlobalAtomicType::U64,
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                             "type={}", static_cast<int>(instr.atom.type.Value()));
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        const auto [real_address, base_address, descriptor] =
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            TrackGlobalMemory(bb, instr, true, true);
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@ -375,25 +399,29 @@ u32 ShaderIR::DecodeMemory(NodeBlock& bb, u32 pc) {
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            break;
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        }
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        const bool is_signed =
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            instr.atoms.type == AtomicType::S32 || instr.atoms.type == AtomicType::S64;
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        Node gmem = MakeNode<GmemNode>(real_address, base_address, descriptor);
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        Node value = Operation(OperationCode::AtomicAdd, std::move(gmem), GetRegister(instr.gpr20));
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        Node value = GetAtomOperation(static_cast<AtomicOp>(instr.atom.operation), is_signed, gmem,
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                                      GetRegister(instr.gpr20));
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        SetRegister(bb, instr.gpr0, std::move(value));
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        break;
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    }
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    case OpCode::Id::ATOMS: {
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        UNIMPLEMENTED_IF_MSG(instr.atoms.operation != AtomicOp::Add, "operation={}",
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                             static_cast<int>(instr.atoms.operation.Value()));
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        UNIMPLEMENTED_IF_MSG(instr.atoms.type != AtomicType::U32, "type={}",
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                             static_cast<int>(instr.atoms.type.Value()));
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        UNIMPLEMENTED_IF_MSG(instr.atoms.operation == AtomicOp::Inc ||
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                                 instr.atoms.operation == AtomicOp::Dec,
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                             "operation={}", static_cast<int>(instr.atoms.operation.Value()));
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        UNIMPLEMENTED_IF_MSG(instr.atoms.type == AtomicType::S64 ||
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                                 instr.atoms.type == AtomicType::U64,
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                             "type={}", static_cast<int>(instr.atoms.type.Value()));
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        const bool is_signed =
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            instr.atoms.type == AtomicType::S32 || instr.atoms.type == AtomicType::S64;
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        const s32 offset = instr.atoms.GetImmediateOffset();
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        Node address = GetRegister(instr.gpr8);
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        address = Operation(OperationCode::IAdd, std::move(address), Immediate(offset));
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        Node memory = GetSharedMemory(std::move(address));
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        Node data = GetRegister(instr.gpr20);
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        Node value = Operation(OperationCode::AtomicAdd, std::move(memory), std::move(data));
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        Node value =
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            GetAtomOperation(static_cast<AtomicOp>(instr.atoms.operation), is_signed,
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                             GetSharedMemory(std::move(address)), GetRegister(instr.gpr20));
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        SetRegister(bb, instr.gpr0, std::move(value));
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        break;
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    }
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@ -162,7 +162,21 @@ enum class OperationCode {
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    AtomicImageXor,      /// (MetaImage, int[N] coords) -> void
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    AtomicImageExchange, /// (MetaImage, int[N] coords) -> void
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    AtomicAdd, /// (memory, {u}int) -> {u}int
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    AtomicUExchange, /// (memory, uint) -> uint
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    AtomicUAdd,      /// (memory, uint) -> uint
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    AtomicUMin,      /// (memory, uint) -> uint
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    AtomicUMax,      /// (memory, uint) -> uint
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    AtomicUAnd,      /// (memory, uint) -> uint
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    AtomicUOr,       /// (memory, uint) -> uint
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    AtomicUXor,      /// (memory, uint) -> uint
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    AtomicIExchange, /// (memory, int) -> int
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    AtomicIAdd,      /// (memory, int) -> int
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    AtomicIMin,      /// (memory, int) -> int
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    AtomicIMax,      /// (memory, int) -> int
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    AtomicIAnd,      /// (memory, int) -> int
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    AtomicIOr,       /// (memory, int) -> int
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    AtomicIXor,      /// (memory, int) -> int
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    Branch,         /// (uint branch_target) -> void
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    BranchIndirect, /// (uint branch_target) -> void
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@ -86,6 +86,20 @@ OperationCode SignedToUnsignedCode(OperationCode operation_code, bool is_signed)
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        return OperationCode::LogicalUNotEqual;
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    case OperationCode::LogicalIGreaterEqual:
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        return OperationCode::LogicalUGreaterEqual;
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    case OperationCode::AtomicIExchange:
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        return OperationCode::AtomicUExchange;
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    case OperationCode::AtomicIAdd:
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        return OperationCode::AtomicUAdd;
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    case OperationCode::AtomicIMin:
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        return OperationCode::AtomicUMin;
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    case OperationCode::AtomicIMax:
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        return OperationCode::AtomicUMax;
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    case OperationCode::AtomicIAnd:
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        return OperationCode::AtomicUAnd;
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    case OperationCode::AtomicIOr:
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        return OperationCode::AtomicUOr;
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    case OperationCode::AtomicIXor:
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        return OperationCode::AtomicUXor;
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    case OperationCode::INegate:
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        UNREACHABLE_MSG("Can't negate an unsigned integer");
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        return {};
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